![]() ![]() Notepad++ has a long list of plug-ins that extend its features. And filling-in a template is faster than recreating the code each time. Templates also help keep me consistent with the accepted HDL coding style. provides a strong code skeleton that I can flesh out with the appropriate I/O and signal declarations. Having a set of predefined templates for things like entities, functions, processes, etc. ![]() If you're like me and you do a lot of things in addition to HDL coding, it can be frustrating trying to get all the syntax correct when you enter a new HDL module after being away from it for a while. For VHDL and Verilog, I specifically needed templates, automated package declarations, and code beautification. ![]() But I finally settled on Notepad++ as my editor of choice. Over a period of years, I drifted through several Windows-specific editors like Zeus and Programmers File Editor. There were so many keystroke combinations involved in using it that I felt like I was casting strange incantations instead of entering code. I had my love affair with it in the '90s but it just didn't work out. It's also been widely ported, so you can use Emacs on just about any OS you'll encounter. This includes packages for working with VHDL and Verilog code. It has powerful add-on packages that make creating and refactoring source code much easier. The remaining 39% is split between a hodge-podge of generic and IDE-specific text editors (e.g., the Xilinx ISE and Altera Quartus editors).Įmacs is most popular for good reason. But if you are using the same editor I do, then maybe I can help you use it more efficiently.Ī poll on HDL editor popularity shows that Emacs is the winner by a wide margin with a 31% share, while vim and Notepad++ are tied at around 15% each. I won't attempt to influence your choice because it really makes no difference to me. Now, right after brace placement in C, the choice of an editor is the topic most likely to incite a nerd civil war (it's a bike-shed issue). Which, of course, implies you're using some form of text editor. Unless you're still living in the '90s and using schematics, your FPGA designs are entered into text files as VHDL or Verilog source. ![]()
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